Integrated circuit fabrications processes include steps in which materials must be selectively removed with respect to other materials. The removal process may use either wet or dry etching. Regardless of the method selected, the selectivity of the etch between the materials that are removed and those that are not removed should be high. However, selectivity is not the only consideration; the skilled artisan readily appreciates that consistent results over an extended period of time should be readily achieved.
Dielectric regions, termed field oxides, are formed in integrated circuit fabrication by depositing a dielectric mask layer over silicon (likely having a thin oxide, termed a pad oxide, on its surface), patterning the dielectric mask layer to expose the silicon or oxide, and then growing a thick oxide in the exposed region. The thick oxide is the field oxide. The patterned dielectric mask layer is then removed. A typical choice of dielectric for the mask layer is silicon nitride. This process is frequently referred to as LOCOS which is a well known acronym for Localized Oxidation of Silicon. In current practice, a polysilicon layer is frequently present underneath the nitride layer. The patterned structure is referred to as a Poly Buffered LOCOS (PBL) stack. Thus, both silicon nitride and polysilicon must be removed without significant attack on the silicon oxide after the field oxide has been grown.
Wet etching techniques are commonly used for blanket stripping of oxides, nitrides, and silicon. For example, silicon nitrides are etched in boiling phosphoric acid. Minor amounts of nitric acid may also be present in the etch bath. However, these baths are susceptible to aging effects and high particle counts because the silicate concentration in the bath increases with wafer throughput. PBL stacks may be removed with a phosphoric acid/nitric acid bath. However, this bath also suffers from bath aging, presumably due to silicate buildup. The process is also relatively slow with 140 minutes being a representative time for etching a typical PBL stack. Pitting of the oxide can be an additional problem as the polysilicon etches rapidly along its grain boundaries. Some pad oxide may be exposed to the etch bath and may etch (pit) the oxide as etch selectivity between polysilicon and the oxide does not prevent all etching of oxide. Yet another approach strips the nitride in one bath and the polysilicon in another bath. This method also yields some pitting as it is difficult to stop the nitride etch without pitting the polysilicon.
Of course, etching of these materials in other contexts is also contemplated. See, Solid State Technology, "Spin Etcher for Removal of Backside Depositions," by Ernst Gaulhofer, May 1991, for a description of etching apparatus and etchants. It is reported that nitric, hydrofluoric, and phosphoric acids are used in a 3:1:1 solution to etch silicon, apparently both single crystal and polycrystalline. No selectivity is reported nor is there any discussion of rejuvenating the etch solution which is important to minimize chemical usage.
Wet etching techniques with high selectivity of nitride and polysilicon with respect to oxide and long bath life are desirable. It will be appreciated that the high selectivity and long bath life should result in higher throughput and lower costs.